1. Field of the Invention
The invention relates in general to a touch panel control system, and more particularly to a technique for measuring a capacitance value in a capacitive touch panel.
2. Description of the Related Art
Operating interfaces of recent electronic products are becoming increasingly user-friendly and intuitive. For example, through a touch panel, a user can directly interact with applications as well as input messages/texts/patterns with fingers or a stylus, thus eliminating complications associated with other input devices such as a keyboard or buttons. According to a touch position on the touch panel and a currently displayed image on the display, an electronic device determines an intention of the touch panel to execute corresponding operations.
Existing touch panel control techniques can be roughly categorized into resistive, capacitive, electromagnetic sensing, ultrasonic and optical types. A capacitive touch panel includes multiple electrodes, whose capacitance values can be changed by a user touch. By measuring whether capacitance changes occur in the electrodes, a position of a touch point can be determined. FIG. 1 shows a stereotypic capacitance detection circuit, with a capacitor Cx representing a detected capacitor. Relations of an input voltage Vi, a reference voltage Vpp and an output voltage Vo can be represented as follows:
                                          Vo            -            Vpp                                1            SCfb                          =                              Vpp            -            Vi                                1            SCx                                              equation        ⁢                                  ⁢                  (          1          )                    
Given the input voltage Vi, the reference voltage Vpp and a capacitance value of a feedback capacitor Cfb, the capacitance value of the detected capacitor Cx can be deduced according to the output voltage Vo. For example, assuming that the reference voltage Vpp is set as a ground voltage, an absolute value of the output voltage Vo and the capacitance value of detected capacitor Cx displays a predetermined directly proportional relationship.
Taking FIG. 2 depicting an electrode array formed by multiple rhombus electrodes for example, through switching by a multiplexer, electrodes E11 to E75 may be sequentially connected to an operational amplifier 12 in a detection circuit 100 to serve as the detected capacitor Cx. In other words, the detection circuit 100 may be utilized to sequentially detect the capacitance value of each of the electrodes. However, such method suffers from a drawback such that, the detection circuit 100 is capable of measuring the capacitance value of only one electrode at a time, and thus is particularly unsuitable for applications of large touch panel control areas due to its slow detection speed.
FIG. 3 shows a detection circuit 300 capable of simultaneously measuring multiple capacitance values of the prior art. Assume that the number of the capacitors is five, and input voltages provided to detected capacitors C1 to C5 are different, as shown in FIG. 3. An operational amplifier 32 and a feedback capacitor Cfb equivalently form a summation circuit, which provides a summation result including the five items:
                    cos        ⁡                  (                      2            ⁢            π            *            M            *            t                    )                    Cfb        *    C    ⁢                  ⁢    1    ,                    cos        ⁡                  (                      2            ⁢            π            *            2            ⁢            M            *            t                    )                    Cfb        *    C    ⁢                  ⁢    2    ,                    cos        ⁡                  (                      2            ⁢            π            *            3            ⁢            M            *            t                    )                    Cfb        *    C    ⁢                  ⁢    3    ,          ⁢                    cos        ⁡                  (                      2            ⁢            π            *            4            ⁢            M            *            t                    )                    Cfb        *    C    ⁢                  ⁢    4    ⁢                  ⁢    and    ⁢                  ⁢                  cos        ⁡                  (                      2            ⁢            π            *            5            ⁢            M            *            t                    )                    Cfb        *    C    ⁢                  ⁢    5    ,where M represents a predetermined frequency.
An analog-to-digital converter (ADC) 34 converts output voltages (i.e., the above summation result) of the operational amplifier 32 to a digital signal. Correspondingly, subsequent multipliers 36A to 36E as well as integrators 38A to 38E are all digital circuits. Integration interval lengths of the integrators 38A to 38E are all (1/M). For a path at which the multiplier 36A and the integrator 38A are located, after passing through the integrator 38A, theoretically, only the item originally corresponding to the frequency M remains while integration results of the other four items are zero. Therefore, the output signal of the integrator 38A is associated with only the capacitance value of the capacitor C1 and is unassociated with the capacitance values of the capacitors C2 to C5. Thus, the capacitance value of the capacitor C1 can be deduced according to the output signal of the multiplier 38A. Similarly, for a path at which the multiplier 36B and the integrator 38B are located, after passing through the integrator 38B, only the item originally corresponding to the frequency 2M remains, and the output signal of the integrator 38B is associated with only the capacitance value of the capacitor C2. Likewise, according to the output signals of the integrators 38B to 38E, the capacitance values of the capacitors C2 to C5 can be deduced.
However, the detection circuit 300 suffers from certain drawbacks. For one example, it is possible that five sinusoidal signals provided to the detected capacitors C1 to C5 are in-phase signals, in a way that the summation result generated at the output end of the operational amplifier 32 shows a peak value. It is understood that, a variation range in the voltage of output signals of the operational amplifier 32 increases as the number of detected capacitors gets larger, leading to a rise in a peak-to-average power ratio (PAPR). Thus, an operational amplifier having a larger linear operation interval is required as the operational amplifier 32. Further, under a constant resolution, the ADC 34 also needs to have a broader input voltage range. The above issues result in increases in both power consumption and hardware costs.